a. Field of the Invention
The present invention generally relates to semiconductor device imaging, and more particularly, to the preparation of semiconductor devices for such device imaging processes.
b. Background of Invention
Based on Moore's Law's the shrinking dimensions of, for example, semiconductor device structures (e.g., Field Effect Transistors), conventional transmission electron microscopy (TEM) techniques may be incapable of generating the thin sample thicknesses required for clearly imaging such structures. Accordingly, TEM sample preparation challenges may become more prevalent.
Automated TEM sample fabrication with instruments such as single and dual beam focused ion beams may include lamella thicknesses in the region of 100 nm. However, device and test structure dimensions may now contain multiple features within a 100 nm slice. This in turn may lead to projection effects which can obfuscate the features of interest and, thus, mask critical information associated with the fabricated sample.
It may, therefore, be desirable, among other things, to provide enhanced TEM sample preparation processes.